From 8314aa62604068e25867c79a08671dc588970a7a Mon Sep 17 00:00:00 2001 From: Richard Kreckel Date: Sun, 24 Apr 2022 01:40:57 +0200 Subject: [PATCH] Disable ARM asm implementation of divu_6432_3232_(). This function is broken: it sometimes returns wrong results. Example: for 2^32*16830+755479655 / 1102945608 it returns q=97437 and r=926900031 (but q=65538 and r=205814231 are correct). At this point, ARM seems to work. --- src/base/cl_low.h | 6 +++--- src/base/digitseq/cl_asm_arm_.cc | 2 ++ 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/src/base/cl_low.h b/src/base/cl_low.h index 68f97c6..e228b9e 100644 --- a/src/base/cl_low.h +++ b/src/base/cl_low.h @@ -703,7 +703,7 @@ inline uint32 mulu32_unchecked (uint32 arg1, uint32 arg2) // < uint32 q: floor(x/y) // < uint32 r: x mod y // < x = q*y+r -#if defined(__GNUC__) && defined(__arm__) && !defined(NO_ASM) +#if defined(__GNUC__) && defined(__arm__) && !defined(NO_ASM) && 0 extern "C" uint64 divu_6432_3232_ (uint32 xhi, uint32 xlo, uint32 y); // -> Quotient q #else extern "C" uint32 divu_6432_3232_ (uint32 xhi, uint32 xlo, uint32 y); // -> Quotient q @@ -752,7 +752,7 @@ inline uint32 mulu32_unchecked (uint32 arg1, uint32 arg2) var uint32 _r __asm__("%g1"); \ cl_unused (q_zuweisung _q); r_zuweisung _r; \ }) -#elif defined(__GNUC__) && defined(__arm__) && !defined(NO_ASM) +#elif defined(__GNUC__) && defined(__arm__) && !defined(NO_ASM) && 0 #define divu_6432_3232(xhi,xlo,y,q_zuweisung,r_zuweisung) \ ({ var uint64 _q = divu_6432_3232_(xhi,xlo,y); /* extern in Assembler */\ q_zuweisung retval64_r0(_q); \ @@ -803,7 +803,7 @@ inline uint32 mulu32_unchecked (uint32 arg1, uint32 arg2) #else #define divu_6432_3232(xhi,xlo,y,q_zuweisung,r_zuweisung) \ { cl_unused (q_zuweisung divu_6432_3232_(xhi,xlo,y)); r_zuweisung divu_32_rest; } - #if (defined(__m68k__) || defined(__sparc__) || defined(__sparc64__) || defined(__arm__) || (defined(__i386__) && !defined(WATCOM) && !defined(MICROSOFT)) || defined(__x86_64__) || defined(__hppa__)) && !defined(NO_ASM) + #if (defined(__m68k__) || defined(__sparc__) || defined(__sparc64__) || (defined(__arm__) && 0) || (defined(__i386__) && !defined(WATCOM) && !defined(MICROSOFT)) || defined(__x86_64__) || defined(__hppa__)) && !defined(NO_ASM) // divu_6432_3232_ extern in Assembler #if defined(__sparc__) || defined(__sparc64__) extern "C" uint32 _get_g1 (void); diff --git a/src/base/digitseq/cl_asm_arm_.cc b/src/base/digitseq/cl_asm_arm_.cc index 75ce5db..d333fdb 100644 --- a/src/base/digitseq/cl_asm_arm_.cc +++ b/src/base/digitseq/cl_asm_arm_.cc @@ -141,6 +141,7 @@ GLABEL(divu_3216_1616_) MOV a1,a1,LSR#16 // and back down again BX lr +#if 0 // extern uint32 divu_6432_3232_ (uint32 xhi, uint32 xlo, uint32 y); // -> Quotient q // extern uint32 divu_32_rest; // -> Rest r // see cl_low_div.cc for algorithm @@ -236,6 +237,7 @@ LABEL(divu_6432_3232_l1) MOV a2, v4, LSR v3 // remainder = r >> s ORR a1, a1, v6, ASL #16 // return highlow32(q1,q0) LDMFD sp!, {v1,v2,v3,v4,v5,v6,pc} +#endif // extern uintD* copy_loop_up (uintD* sourceptr, uintD* destptr, uintC count); // entry -- 2.49.0